Trigger is an elementary device that is a digital machine with two stability states, one of which is assigned the value "1", and the other is assigned a "0".
By the way of realization of logical connections, one distinguishesthe following types of devices: T-flip-flop, D flip-flop, JK flip-flop, RS flip-flops. Naturally, the most common variants are listed here, but apart from them there are automatic devices of other types.
In this article we will consider in more detail the D-trigger. The machine has a single information (D) input, so it is designed to implement the time delay function.
Principle of operation
The characteristic equation Q (t + 1) = Dt describes the operation of this type of device, such as the D-trigger. The truth table (jump table) for this digital machine is shown below.
| TOt | Dt | TO(t + 1) |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
As you can see, in the first and fourth rows of the valuesignals Q at the instants of time t and t + 1 coincide. That is, the D flip-flop is an element of the signal delay. As a result, the considered devices of the asynchronous type did not find their application, since the output will be repeated with an input signal with a small time delay.
D-trigger synchronous type is built from single-level (single-stage) and two-level (two-stage) RS-devices of the same type. The mentioned automata function according to the transition table.
A single-stage D flip-flop can be executed from a single-level synchronous RS-device and one AND-HE1 element, which connects both inverse inputs of the D flip-flop to a single information (D) input.
When a logical zero arrives at the synchronizing input, the RS type automatic machine is blocked by the logical unit level from the outputs of the NAND elements2 and NAND3. When changing the synchronization signal level,(at D = 1) or at the input R (for D = 0) of the asynchronous trigger T. It will switch to a state corresponding to the logic level D. A single-stage D-type trigger delays propagation input for the time of a pause between synchronizing signals.
D-trigger with dynamic control. Description of work, functional diagram
Automatic device of this kindis constructed from three RS-triggers of the asynchronous type. They are built on NAND elements, with two of them performing a commutation function, and the third is output. The output signals of the switching triggers are designed to control the output trigger.
At a signal level C equal to logical zero,the inputs of the output flip-flop receive a neutral combination of signals, and it switches to the storage mode. When the information signal changes, the switching triggers go into the standby mode, and as soon as the signal to the logical unit arrives at the enable input of the trigger C, the output automaton is set to a new state that corresponds to the information signal at the D input in the previous clock cycle.
In the event that the change in the level of informationsignal will pass during the setting of the output flip-flop, then the switching devices will not skip the signal. It turns out that the purpose of switching triggers is to receive information signals, transfer them to the input of the output device at the moment of signal change at control input C from logic zero to logical unit and self-blocking from the action of the signal at the information input.
